| A 70 db sndr 200 ms/s 2.3 mw dynamic pipelined sar adc in 28nm digital cmos B Verbruggen, K Deguchi, B Malki, J Craninckx 2014 Symposium on VLSI Circuits Digest of Technical Papers, 1-2, 2014 | 110 | 2014 |
| A 70dB DR 10b 0-to-80MS/s current-integrating SAR ADC with adaptive dynamic range B Malki, T Yamamoto, B Verbruggen, P Wambacq, J Craninckx Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 …, 2012 | 82 | 2012 |
| A 2.1 mW 11b 410 MS/s dynamic pipelined SAR ADC with background calibration in 28nm digital CMOS B Verbruggen, M Iriguchi, M de la Guia Solaz, G Glorieux, K Deguchi, ... 2013 Symposium on VLSI Circuits, C268-C269, 2013 | 77 | 2013 |
| A complementary dynamic residue amplifier for a 67 dB SNDR 1.36 mW 170 MS/s pipelined SAR ADC B Malki, B Verbruggen, P Wambacq, K Deguchi, M Iriguchi, J Craninckx ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 215-218, 2014 | 38 | 2014 |
| A 150 kHz–80 MHz BW discrete-time analog baseband for software-defined-radio receivers using a 5th-order IIR LPF, active FIR and a 10 bit 300 MS/s ADC in 28 nm CMOS B Malki, B Verbruggen, E Martens, P Wambacq, J Craninckx IEEE Journal of Solid-State Circuits 51 (7), 1593-1606, 2016 | 17 | 2016 |
| A 150 kHz-80 MHz BW DT analog baseband for SDR RX using a 5th-order IIR LPF, active FIR and 10b 300 MS/s ADC in 28nm CMOS B Malki, B Verbruggen, E Martens, P Wambacq, J Craninckx ESSCIRC Conference 2015-41st European Solid-State Circuits Conference …, 2015 | 2 | 2015 |
| Integrator-based analog-to-digital converters (ADCs) for wireless applications B Malki | | 2018 |
| Correction to “A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range”[May 14 1173-1183] B Malki, T Yamamoto, B Verbruggen, P Wambacq, J Craninckx IEEE Journal of Solid-State Circuits 50 (2), 619-619, 2015 | | 2015 |
| ISSCC 2012/SESSION 27/DATA CONVERTER TECHNIQUES/27.7 B Malki, T Yamamoto, B Verbruggen, P Wambacq, J Craninckx | | |
