0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS Y Okuma, K Ishida, Y Ryu, X Zhang, PH Chen, K Watanabe, M Takamiya, ...
IEEE Custom Integrated Circuits Conference 2010, 1-4, 2010
357 2010 Startup Techniques for 95 mV Step-Up Converter by Capacitor Pass-On Scheme and PH Chen, K Ishida, K Ikeuchi, X Zhang, K Honda, Y Okuma, Y Ryu, ...
IEEE Journal of Solid-State Circuits 47 (5), 1252-1260, 2012
154 2012 0.18-V input charge pump with forward body biasing in startup circuit using 65nm CMOS PH Chen, K Ishida, X Zhang, Y Okuma, Y Ryu, M Takamiya, T Sakurai
IEEE Custom Integrated Circuits Conference 2010, 1-4, 2010
120 2010 An ultra-low voltage level shifter using revised wilson current mirror for fast and energy-efficient wide-range voltage conversion from sub-threshold to I/O voltage J Zhou, C Wang, X Liu, X Zhang, M Je
IEEE Transactions on Circuits and Systems I: Regular Papers 62 (3), 697-706, 2015
97 2015 A 95mV-startup step-up converter with Vth -tuned oscillator by fixed-charge programming and capacitor pass-on scheme PH Chen, K Ishida, K Ikeuchi, X Zhang, K Honda, Y Okuma, Y Ryu, ...
2011 IEEE International Solid-State Circuits Conference, 216-218, 2011
80 2011 RaPiD: AI accelerator for ultra-low precision training and inference S Venkataramani, V Srinivasan, W Wang, S Sen, J Zhang, A Agrawal, ...
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021
75 2021 9.1 a 7nm 4-core AI chip with 25.6 TFLOPS hybrid FP8 training, 102.4 TOPS INT4 inference and workload-aware throttling A Agrawal, SK Lee, J Silberman, M Ziegler, M Kang, S Venkataramani, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 144-146, 2021
75 2021 A 0.6 v input ccm/dcm operating digital buck converter in 40 nm cmos X Zhang, PH Chen, Y Okuma, K Ishida, Y Ryu, K Watanabe, T Sakurai, ...
IEEE Journal of Solid-State Circuits 49 (11), 2377-2386, 2014
75 2014 A 120-mV input, fully integrated dual-mode charge pump in 65-nm CMOS for thermoelectric energy harvester PH Chen, K Ishida, X Zhang, Y Okuma, Y Ryu, M Takamiya, T Sakurai
17th Asia and South Pacific Design Automation Conference, 469-470, 2012
67 2012 An 80 mV startup dual-mode boost converter by charge-pumped pulse generator and threshold voltage tuned oscillator with hot carrier injection PH Chen, X Zhang, K Ishida, Y Okuma, Y Ryu, M Takamiya, T Sakurai
IEEE Journal of Solid-State Circuits 47 (11), 2554-2562, 2012
65 2012 A survey on the optimization of neural network accelerators for micro-AI on-device inference AN Mazumder, J Meng, HA Rashid, U Kallakuri, X Zhang, JS Seo, ...
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (4 …, 2021
48 2021 30.7 A 60Mb/s wideband BCC transceiver with 150pJ/b RX and 31pJ/b TX for emerging wearable applications J Lee, VV Kulkarni, CK Ho, JH Cheong, P Li, J Zhou, W Da Toh, X Zhang, ...
2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014
48 2014 Misleading energy and performance claims in sub/near threshold digital systems Y Pu, X Zhang, J Huang, A Muramatsu, M Nomura, K Hirairi, H Takata, ...
2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 625-631, 2010
48 2010 A 80-mV input, fast startup dual-mode boost converter with charge-pumped pulse generator for energy harvesting PH Chen, K Ishida, X Zhang, Y Okuma, Y Ryu, M Takamiya, T Sakurai
IEEE Asian Solid-State Circuits Conference 2011, 33-36, 2011
37 2011 A fast and energy-efficient level shifter with wide shifting range from sub-threshold up to I/O voltage J Zhou, C Wang, X Liu, X Zhang, M Je
2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 137-140, 2013
30 2013 A 12-or 48-V Input, 0.9-V Output Active-Clamp Forward Converter Power Block for Servers and Datacenters X Zhang, B Nguyen, A Ferencz, T Takken, R Senger, P Coteus
IEEE Transactions on Power Electronics 35 (2), 1721-1731, 2019
29 2019 Analytic model for power MOSFET turn-off switching loss under the effect of significant current diversion at fast switching events B Nguyen, X Zhang, A Ferencz, T Takken, R Senger, P Coteus
2018 IEEE Applied Power Electronics Conference and Exposition (APEC), 287-291, 2018
28 2018 A 0.45-V input on-chip gate boosted (OGB) buck converter in 40-nm CMOS with more than 90% efficiency in load range from 2µW to 50µW X Zhang, PH Chen, Y Ryu, K Ishida, Y Okuma, K Watanabe, T Sakurai, ...
2012 Symposium on VLSI Circuits (VLSIC), 194-195, 2012
20 2012 A 7-nm four-core mixed-precision AI chip with 26.2-TFLOPS hybrid-FP8 training, 104.9-TOPS INT4 inference, and workload-aware throttling SK Lee, A Agrawal, J Silberman, M Ziegler, M Kang, S Venkataramani, ...
IEEE Journal of Solid-State Circuits 57 (1), 182-197, 2021
19 2021 0.5-V input digital low-dropout regulator (LDO) with 98.7% current efficiency in 65 nm CMOS Y Okuma, K Ishida, Y Ryu, X Zhang, PH Chen, K Watanabe, M Takamiya, ...
IEICE transactions on electronics 94 (6), 938-944, 2011
18 2011 
Todd TakkenIBMBestätigte E-Mail-Adresse bei us.ibm.com
