A low overhead fault tolerant routing scheme for 3D Networks-on-Chip S Pasricha, Y Zou 2011 12th International Symposium on Quality Electronic Design, 1-8, 2011 | 108 | 2011 |
NS-FTR: A fault tolerant routing scheme for networks on chip with permanent and runtime intermittent faults S Pasricha, Y Zou 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 443-448, 2011 | 46 | 2011 |
OE+ IOE: A novel turn model based fault tolerant routing scheme for networks-on-chip S Pasricha, Y Zou, D Connors, HJ Siegel Proceedings of the eighth IEEE/ACM/IFIP international conference on hardware …, 2010 | 44 | 2010 |
Makespan and energy robust stochastic static resource allocation of a bag-of-tasks to a heterogeneous computing system MA Oxley, S Pasricha, AA Maciejewski, HJ Siegel, J Apodaca, D Young, ... IEEE Transactions on Parallel and Distributed Systems 26 (10), 2791-2805, 2014 | 41 | 2014 |
Deadline and energy constrained dynamic resource allocation in a heterogeneous computing environment BD Young, J Apodaca, LD Briceño, J Smith, S Pasricha, AA Maciejewski, ... The Journal of Supercomputing 63, 326-347, 2013 | 36 | 2013 |
NARCO: neighbor aware turn model-based fault tolerant routing for NoCs Y Zou, S Pasricha IEEE Embedded Systems Letters 2 (3), 85-89, 2010 | 31 | 2010 |
Stochastically robust static resource allocation for energy minimization with a makespan constraint in a heterogeneous computing environment J Apodaca, D Young, L Briceno, J Smith, S Pasricha, AA Maciejewski, ... 2011 9th IEEE/ACS International Conference on Computer Systems and …, 2011 | 19 | 2011 |
Reliability-aware and energy-efficient synthesis of NoC based MPSoCs Y Zou, S Pasricha International Symposium on Quality Electronic Design (ISQED), 643-650, 2013 | 15 | 2013 |
HEFT: A hybrid system-level framework for enabling energy-efficient fault-tolerance in NoC based MPSoCs Y Zou, S Pasricha Proceedings of the 2014 International Conference on Hardware/Software …, 2014 | 11 | 2014 |
Energy-constrained dynamic resource allocation in a heterogeneous computing environment BD Young, J Apodaca, LD Briceno, J Smith, S Pasricha, AA Maciejewski, ... 2011 40th International Conference on Parallel Processing Workshops, 298-307, 2011 | 7 | 2011 |
Characterizing vulnerability of network interfaces in embedded chip multiprocessors Y Zou, Y Xiang, S Pasricha IEEE Embedded Systems Letters 4 (2), 41-44, 2012 | 6 | 2012 |
Analysis of on-chip interconnection network interface reliability in multicore systems Y Zou, Y Xiang, S Pasricha 2011 IEEE 29th International Conference on Computer Design (ICCD), 427-428, 2011 | 3 | 2011 |
Reliability-aware and energy-efficient system level design for networks-on-chip Y Zou, S Pasricha, S Roy, T Chen, W Bohm Colorado State University. Libraries, 2015 | | 2015 |
Hybrid Partially Adaptive Fault‐Tolerant Routing for 3D Networks‐on‐Chip S Pasricha, Y Zou Embedded Systems: Hardware, Design, and Implementation, 239-258, 2012 | | 2012 |
OE+ IOE S Pasricha, Y Zou, D Connors, HJ Siegel Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware …, 2010 | | 2010 |
Reliability-Aware and Energy-Efficient System Level Design for Networks-on-Chip Doctoral Defense Y Zou | | |