| Evaluating the security of logic encryption algorithms P Subramanyan, S Ray, S Malik 2015 IEEE International Symposium on Hardware Oriented Security and Trust …, 2015 | 861 | 2015 |
| Functional analysis attacks on logic locking D Sirone, P Subramanyan IEEE Transactions on Information Forensics and Security 15, 2514-2527, 2020 | 205 | 2020 |
| Reverse engineering digital circuits using structural and functional analyses P Subramanyan, N Tsiskaridze, W Li, A Gascon, WY Tan, A Tiwari, ... Emerging Topics in Computing, IEEE Transactions on 2 (1), 63-80, 2014 | 172 | 2014 |
| A formal foundation for secure remote execution of enclaves P Subramanyan, R Sinha, I Lebedev, S Devadas, SA Seshia Proceedings of the 2017 ACM SIGSAC conference on computer and communications …, 2017 | 169 | 2017 |
| Malware detection using machine learning based analysis of virtual memory access patterns Z Xu, S Ray, P Subramanyan, S Malik Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 141 | 2017 |
| Wordrev: Finding word-level structures in a sea of bit-level gates W Li, A Gascon, P Subramanyan, WY Tan, A Tiwari, S Malik, N Shankar, ... Hardware-Oriented Security and Trust (HOST), 2013 IEEE International …, 2013 | 124 | 2013 |
| Reverse engineering digital circuits using functional analysis P Subramanyan, N Tsiskaridze, K Pasricha, D Reisman, A Susnea, ... 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013 | 117 | 2013 |
| A formal approach to secure speculation K Cheang, C Rasmussen, S Seshia, P Subramanyan 2019 IEEE 32nd Computer Security Foundations Symposium (CSF), 288-28815, 2019 | 99 | 2019 |
| Instruction-level abstraction (ila) a uniform specification for system-on-chip (soc) verification BY Huang, H Zhang, P Subramanyan, Y Vizel, A Gupta, S Malik ACM Transactions on Design Automation of Electronic Systems (TODAES) 24 (1 …, 2018 | 84 | 2018 |
| Template-based circuit understanding A Gascón, P Subramanyan, B Dutertre, A Tiwari, D Jovanović, S Malik 2014 Formal Methods in Computer-Aided Design (FMCAD), 83-90, 2014 | 62 | 2014 |
| Verifying information flow properties of firmware using symbolic execution P Subramanyan, S Malik, H Khattri, A Maiti, J Fung 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 337-342, 2016 | 60 | 2016 |
| All-SAT using minimal blocking clauses Y Yu, P Subramanyan, N Tsiskaridze, S Malik 2014 27th International Conference on VLSI Design and 2014 13th …, 2014 | 58 | 2014 |
| Formal verification of taint-propagation security properties in a commercial SoC design P Subramanyan, D Arora 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-2, 2014 | 57 | 2014 |
| UCLID5: Integrating modeling, verification, synthesis and learning SA Seshia, P Subramanyan 2018 16th ACM/IEEE International Conference on Formal Methods and Models for …, 2018 | 55 | 2018 |
| Template-based synthesis of instruction-level abstractions for SoC verification P Subramanyan, Y Vizel, S Ray, S Malik 2015 Formal Methods in Computer-Aided Design (FMCAD), 160-167, 2015 | 44 | 2015 |
| Hyperfuzzing for soc security validation SK Muduli, G Takhar, P Subramanyan Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 40 | 2020 |
| Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors P Subramanyan, V Singh, KK Saluja, E Larsson 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 39 | 2010 |
| Lazy self-composition for security verification W Yang, Y Vizel, P Subramanyan, A Gupta, S Malik Computer Aided Verification: 30th International Conference, CAV 2018, Held …, 2018 | 32 | 2018 |
| Energy-efficient fault tolerance in chip multiprocessors using critical value forwarding P Subramanyan, V Singh, KK Saluja, E Larsson 2010 IEEE/IFIP International Conference on Dependable Systems & Networks …, 2010 | 31 | 2010 |
| Template-based parameterized synthesis of uniform instruction-level abstractions for SoC verification P Subramanyan, BY Huang, Y Vizel, A Gupta, S Malik IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 25 | 2017 |
Sharad MalikProfessor of Electrical and Computer Engineering, Princeton UniversityBestätigte E-Mail-Adresse bei princeton.edu
