Pencil: A platform-neutral compute intermediate language for accelerator programming R Baghdadi, U Beaugnon, A Cohen, T Grosser, M Kruse, C Reddy, ... 2015 International Conference on Parallel Architecture and Compilation (PACT …, 2015 | 169 | 2015 |
VOBLA: A vehicle for optimized basic linear algebra U Beaugnon, A Kravets, S Van Haastregt, R Baghdadi, D Tweed, J Absar, ... Proceedings of the 2014 SIGPLAN/SIGBED conference on Languages, compilers …, 2014 | 28 | 2014 |
Telamalloc: Efficient on-chip memory allocation for production machine learning accelerators M Maas, U Beaugnon, A Chauhan, B Ilbeyi Proceedings of the 28th ACM International Conference on Architectural …, 2022 | 22 | 2022 |
Optimization space pruning without regrets U Beaugnon, A Pouille, M Pouzet, J Pienaar, A Cohen Proceedings of the 26th International Conference on Compiler Construction, 34-44, 2017 | 20 | 2017 |
A transferable approach for partitioning machine learning models on multi-chip-modules X Xie, P Prabhu, U Beaugnon, P Phothilimthana, S Roy, A Mirhoseini, ... Proceedings of Machine Learning and Systems 4, 370-381, 2022 | 8 | 2022 |
From SSA to synchronous concurrency and back H Pompougnac, U Beaugnon, A Cohen, D Potop-Butucaru INRIA Sophia Antipolis-Méditerranée (France), 2020 | 5 | 2020 |
On the representation of partially specified implementations and its application to the optimization of linear algebra kernels on GPU U Beaugnon, B Clément, N Tollenaere, A Cohen arXiv preprint arXiv:1904.03383, 2019 | 5 | 2019 |
Weaving synchronous reactions into the fabric of SSA-form compilers H Pompougnac, U Beaugnon, A Cohen, DP Butucaru ACM Transactions on Architecture and Code Optimization (TACO) 19 (2), 1-25, 2022 | 2 | 2022 |
In-place update in a dataflow synchronous language: A retiming-enabled language experiment U Beaugnon, A Cohen, M Pouzet Proceedings of the 19th International Workshop on Software and Compilers for …, 2016 | 1 | 2016 |
PENCIL: A platform-neutral intermediate language for the parallelizing compilation of DSLs U Beaugnon, MR Baghdadi, J Absar, A Betts, A Cohen, A Donaldson, ... Domain-Specific Language Design and Implementation (DSLDI, associated with …, 2014 | 1 | 2014 |
CONSTRAINED DEVICE PLACEMENT USING NEURAL NETWORKS X Xie, A Mirhoseini, J Laudon, PM Phothilimthana, S Roy, PJ Prabhu, ... US Patent App. 18/697,182, 2024 | | 2024 |
Additive compilation to achieve high-performance on GPUs U Beaugnon, B Clément, A Cohen, A Drebes, N Tollenaere | | 2020 |
Efficient code generation for hardware accelerators by refining partially specified implementation| Theses. fr U Beaugnon Paris Sciences et Lettres (ComUE), 2019 | | 2019 |
Efficient code generation for hardware accelerators by refining partially specified implementation U Beaugnon Université Paris sciences et lettres, 2019 | | 2019 |
On the Representation of Partially Specified Implementations and its Application to the Optimization of Linear Algebra Kernels on GPU A Cohen, U Beaugnon | | 2019 |
Pencil A Platform-Neutral Compute Intermediate Language for DSL Compilers MR Baghdadi, J Absar, U Beaugnon, A Betts, A Cohen, R Dávid, ... 10th International Conference on High Performance and Embedded Architectures …, 2015 | | 2015 |
Efficient arrays for dataflow synchronous languages U Beaugnon, TP ENS | | 2014 |
PACT 2019 A Zaks, B Motik, C Villavieja, F Aurangzeb, G Blelloch, J Huang, J Shun, ... | | |